Our Organizers

We wish to thank our organizers who worked to make this event a success.

Paul BudnikPaul Budnik

Paul Budnik is co-founder and CTO for startup Texas LDPC. His focus areas are image and signal processing, parallel computing, algorithm design, object-based implementation, and forward error-correcting codes such as LDPC. With his strong theoretical background and his extensive practical experience in solving difficult problems, he has led major projects in signal processing. The topics involved include image processing, MPEG compression chips, and tools for DSP design and development. His clients include Suni Medical Imaging, Cadence Design Systems, and Octel Communications. He was previously Director of Tools Systems, Manager of Software Engineering, and DSP Architect for Zoran, a leading developer of DSP chips. He holds a patent for a digital filter processor and has written articles on parallel memories. He has been active for many years in the IEEE Consultants Network of Silicon Valley. He developed one of the first applications for the pioneering Illiac IV computer, an early highly parallel machine. He received his PhD in computer science from the University of Illinois, working under famed researcher David Kuck.

Tom BurnieceTom Burniece
Independent Business Consultant

Tom Burniece is an independent business consultant with over 30 years of senior management experience in the networking and storage markets, specializing in strategy formulation, business development, marketing, and due diligence. He has been the CEO of iVivity, Rutilus Software, and Voelker Technologies, as well as Chairman of Ciprico and a senior executive at Copan, Maxtor, Digital Equipment, and Control Data. He holds a BSEE from the University of Minnesota and an MSEE from Arizona State University. He is also a graduate of MIT’s Sloan Senior Executive Program.

Walt HubisWalt Hubis
Distinguished Engineer
Hubis Technical Associates
Organizer Chair

Walt is a Software Architect with extensive experience defining the next generation of computer storage products, solutions, and standards. Walt has over twenty years of experience in storage systems engineering in both development and managerial positions and has authored several key patents in RAID and other storage related technologies. His experience includes leadership roles in network attached storage (NAS), secure storage systems and related cryptography, and non-volatile memory (NVM) as storage. Walt has also had extensive experience in national and international storage standards organizations, including leadership roles.

Uma ParepalliUma Parepalli
Senior Director
Organizer Chair

Uma Parepalli is a senior level architecture and management leader with more than 28 years of experience in engineering, product and program management in enterprise, cloud and data center servers, storage, and networking, real-time embedded systems, consumer electronics, automotive, locomotive and aerospace domains. He is currently with Marvell and prior to that he worked for SK Hynix, Broadcom, Dell EMC, Intel, Wipro and others. Uma is an expert in hardware-software codesign and development of Intel and ARM64 Servers, Storage (PCIe NVMe, Fabrics, SAS, SATA), Platform firmware/UEFI domains. He had lead diversity & inclusion teams at Dell EMC and Intel earlier, and is the first diversity chair at Flash Memory Summit in 2019. Uma is a computer engineering graduate from University of Mysore.

Conference ConCepts